1. Field of the Invention
The present invention relates to a method for forming a silicide film of a semiconductor device, and more particularly to a method for forming a silicide film of a semiconductor device using a silicidation blocking layer.
2. Description of the Background Art
As information technology rapidly develops, highly integrated semiconductor devices having rapid data transfer rates are needed in order to quickly process large amounts of data. Thus, the patterns of the semiconductor devices have become extremely minute and also have multi-layered structures. Since the patterns have multi-layered structures, contacts should be formed to electrically connect the patterns that are spaced apart from each other by interlayer dielectric films. The sizes of contact windows for connecting the patterns are reduced according to the degree of integration of the semiconductor device. Hence, when polysilicon is used for forming contacts as in conventional methods for forming semiconductor devices, the semiconductor device may not operate at a high speed and power consumption of the semiconductor device may increase because contact resistance or sheet resistance increases.
To solve the above-mentioned problem, a method for forming a metal silicide film including a compound of metal and silicon on active regions such as source/drain regions of a semiconductor device is known. The process for forming the silicide film is known as a silicidation process. For example, a silicidation process is disclosed in U.S. Pat. No. 6,100,145 issued to Kepler et al.
In the silicidation process, a metal such as titanium (Ti), nickel (Ni) or cobalt (Co) is deposited and thermally treated so that titanium silicide, nickel silicide or cobalt silicide is formed accordingly as the metal reacts with silicon existing in an underlying layer. As for a semiconductor device manufactured with a design rule of approximately 0.25 xcexcm, cobalt silicide is mainly used because cobalt silicide does not much depend on the critical dimension (CD) of the gate electrode of the semiconductor device.
A memory cell region and a logic region are formed together as one chip in view of the required high integration of semiconductor devices. When silicide films are formed in both the memory cell and the logic regions, the junction leakage current characteristic of the semiconductor device may be deteriorated due to the silicide film, being formed in the source/drain region of the memory cell region. As a result, the refresh characteristic of the semiconductor device may be deteriorated and power consumption of the semiconductor device may be increased because the data maintenance characteristic of the memory cell is deteriorated.
Accordingly, the silicidation process should be executed in the memory cell region and the logic region using different materials, or the silicidation process should be selectively performed in the memory cell and the logic regions. Particularly, the silicide film should be formed on the gate electrode and on the source/drain in the logic region, but the silicide film should be formed only on the gate electrode in the memory cell region, in order to improve the contact characteristic. For such purpose, a silicidation blocking layer (SBL) is formed so that the silicidation process is selectively performed at a desired region. When the SBL is present, the silicide film is not formed in the memory cell region, but the silicide film is selectively formed in the peripheral region of the DRAM and in the active portion of the logic region of the DRAM, so that the refresh characteristic is prevented from being deteriorated.
Before cobalt is deposited, the SBL can be formed using a middle temperature oxide (MTO) that does not react with cobalt. The SBL may include a silicon nitride (SiN) film formed through a low pressure chemical vapor deposition (LPCVD) process.
Korean Laid Open Patent Publication No. 1999-76400 discloses a method for forming the SBL of a transistor. However, the impurity ions implanted into the source/drain region may be thermally stressed because the SBL is formed at a high temperature of above approximately 650xc2x0 C., after an ion implantation process for the source/drain region is completed. That is, after the ions are implanted into the source/drain region, the ions in the source/drain region are diffused and rearranged in accordance with the thermal stress caused by the formation of the SBL.
Also, when a dry etching process is executed to remove the SBL, the performance of the transistor may be deteriorated because the elements of the transistor can be damaged due to the plasma applied during the etching process. Thus, the SBL is typically formed through a chemical vapor deposition (CVD) process at a low temperature, and the SBL is patterned to form a SBL pattern using an etching solution having a high etching selectivity relative to underlying layers.
However, when a rinsing process is executed in order to remove an oxide film naturally formed on a substrate before cobalt is deposited, a failure such as a short may occur because the SBL formed by the CVD process is exceedingly etched such that the SBL does not block the silicidation during depositing of the cobalt. As a result, the productivity of the semiconductor manufacturing process may be reduced.
The present invention is therefore directed to a method for forming a silicide film of a semiconductor device which substantially overcomes one or more of the problems due to the limitations and disadvantages of the related art.
An object of the present invention is to therefore provide a method for forming a silicide film of a semiconductor device using a hardened silicidation blocking layer.
In order to achieve this and other objects of the present invention, there is provided a method for forming a silicide film of a semiconductor device, wherein after formation of a silicidation blocking pattern on a semiconductor substrate including silicon, the silicidation blocking pattern is hardened by a thermal treatment. A native oxide film formed on the substrate is removed by rinsing the substrate, because the native oxide film would prevent subsequent formation of a silicide film. The silicide film is formed in a region of the substrate exposed by the silicidation blocking pattern.
Also, to achieve the above and other objects of the present invention, there is provided a method for forming a silicide film of a semiconductor device, wherein after forming gate electrodes including polysilicon on a semiconductor substrate having silicon, source/drain regions are formed by implanting impurity ions into portions of the substrate adjacent to the gate electrodes, and spacers are formed on sidewalls of the gate electrodes, respectively. A silicidation blocking pattern is formed on the substrate including the gate electrodes and the source/drain regions to expose a portion of the substrate where a silicide film is to be formed. The silicidation blocking pattern is hardened and the ions in the source/drain regions are activated by rapidly and thermally treating the substrate under a nitrogen gas atmosphere. A native oxide film formed on the substrate is removed by rinsing the substrate, because the native oxide film would prevent subsequent formation of a silicide film. The silicide film is formed on the exposed portion of the substrate.
According to the present invention, the suicide film can be exactly formed on a certain portion of the substrate, and the substrate is not damaged during rinsing of the substrate due to the hardening of the silicidation blocking layer by thermal treatment.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.